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Applications of zero-suppressed decision diagrams [electronic resource]

  • 作者: Sasao, Tsutomu.
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  • 其他題名:
    • Synthesis lectures on digital circuits and systems ;
  • 出版: [San Rafael, CA] : Morgan & Claypool Publishers
  • 叢書名: Synthesis lectures on digital circuits and systems ;45
  • 主題: Decision logic tables. , Logic circuits--Design. , Decision making--Mathematical models. , Logic, Symbolic and mathematical. , Graphic methods. , Electronic books.
  • ISBN: 9781627056502 (electronic bk.)
  • FIND@SFXID: CGU
  • 資料類型: 電子書
  • 內容註: Includes bibliographical references and index. Applications of zero-suppressed decision diagrams -- Abstract -- Contents -- Preface -- Acknowledgments -- Chapter 1. Introduction to Zero-Suppressed Decision Diagrams -- Chapter 2. Efficient Generation of Prime Implicants and Irredundant Sum-of-Products Expressions -- Chapter 3. The Power of Enumeration–BDD/ZDD-Based Algorithms for Tackling Combinatorial Explosion -- Chapter 4. Regular Expression Matching Using Zero-Suppressed Decision Diagrams -- Appendix A. Solutions -- Authors' and Editors' Biographies -- Index.
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  • 系統號: 005407209 | 機讀編目格式
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