Logic synthesis for finite state machines based on linear chains of states : foundations, recent developments and challenges

• 作者： Barkalov, Alexander, author.
• 其他作者：
  • Titarenko, Larysa, author.
  • Bieganowski, Jacek, author.
  • SpringerLink (Online service)
• 其他題名：
  • Studies in systems, decision and control ;
• 出版： Cham : Springer International Publishing :Imprint: Springer
• 叢書名： Studies in systems, decision and control,volume 113
• 主題： Sequential machine theory. , Engineering. , Computational Intelligence. , Circuits and Systems.
• ISBN： 9783319598376 (electronic bk.) 、 9783319598369 (paper)
• FIND@SFXID: CGU
• 資料類型: 電子書
• 內容註: Introduction -- Finite state machines and field-programmable gate arrays -- Linear chains in FSMs -- Hardware reduction for Moore UFSMs -- Hardware reduction for Mealy UFSMs -- Hardware reduction for Moore NFSMs -- Hardware reduction for Moore XFSMs.
• More
• 摘要註: This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs) To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations) This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation. This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units.
• 讀者標籤：

  需登入
• 引用連結：

  Copy Link
• 目前引用數
• Share: