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Digital system design with SystemVerilog

  • 作者: Zwolinski, Mark.
  • 出版: Upper Saddle River, NJ : Addison-Wesley
  • 叢書名: The Prentice Hall modern semiconductor design series
  • 主題: Verilog (Computer hardware description language) , Electronic digital computers--Design and construction , Computer simulation
  • ISBN: 9780137045792 (hbk.) 、 0137045794 (hbk.)
  • 資料類型: 圖書
  • 內容註: Includes bibliographical references and index. Introduction -- Combinational logic design -- Combinational logic using SystemVerilog gate models -- Combinational building blocks -- SystemVerilog models of sequential logic blocks -- Synchronous sequential design -- Complex sequential systems -- Writing testbenches -- SystemVerilog simulation -- SystemVerilog synthesis -- Testing digital systems -- Design for testability -- Asynchronous sequential design -- Interfacing with the analog world -- Appendix: SystemVerilog and Verilog -- Answers to selected exercises.
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  • 系統號: 005072416 | 機讀編目格式
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