Three-dimensional integrated circuit design [electronic resource]

• 作者： Pavlidis, Vasilis F., 1976-
• 其他作者：
  • Friedman, Eby G.
  • ScienceDirect (Online service)
• 出版： Amsterdam ;Boston : Morgan Kaufmann
• 叢書名： The Morgan Kaufmann series in systems on silicon
• 主題： Integrated circuits--Design and construction , Electronic books.
• ISBN： 9780123743435 、 0123743435
• FIND@SFXID: CGU
• 資料類型: 電子書
• 內容註: Includes bibliographical references (p. 289-303) and index. Chapter 1. Introduction -- Chapter 2. Manufacturing of 3-D Packaged Systems -- Chapter 3. 3-D Integrated Circuit Fabrication Technologies -- Chapter 4. Interconnect Prediction Models -- Chapter 5. Physical Design Techniques for 3-D ICs -- Chapter 6. Thermal Management Techniques -- Chapter 7. Timing Optimization for Two-Terminal Interconnects -- Chapter 8. Timing Optimization for Multi-Terminal Interconnects -- Appendix A: Enumeration of Gate Pairs in a 3-D IC --Appendix B: Formal Proof of Optimum Single Via Placement -- Appendix C: Proof of the Two-Terminal Via Placement Heuristic -- Appendix D: Proof of Condition for Via Placement of Multi-Terminal Nets -- References.
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• 摘要註: With vastly increased complexity and functionality in the "nanometer era" (i.e. hundreds of millions of transistors on one chip), increasing the performance of integrated circuits has become a challenging task. This is due primarily to the inevitable increase in the distance among circuit elements and interconnect design solutions have become the greatest determining factor in overall performance.
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