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Introductory VHDL : from simulation to synthesis
- 作者: Yalamanchili, Sudhakar.
- 出版: Upper Saddle River, NJ : Prentice Hall
- 主題: VHDL (Computer hardware description language)
- ISBN: 0130809829 (hbk.): US$100.00
- 資料類型: 圖書
- 內容註: Includes bibliographical references and index Includes the Xilinx student edition foundation series software (ISBN 0-13-089923-2)
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讀者標籤:
- 系統號: 005228722 | 機讀編目格式
館藏資訊
This book focuses on presenting the basic features of the VHDL language in the context of its use for both simulation and synthesis. Basic language concepts are motivated by familiarity with digital logic circuits with simulation and synthesis presented as complementary design processes. Field programmable gate arrays are used as the medium for synthesis laboratory exercises, and tutorials are provided for the use of the new integrated design environments from Xilinx--which is available with the book. For engineers interested in Digital Design Laboratory, Digital Design, Advanced Digital Design, and Advanced Digital Logic
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